One of the methods used in the past to reduce the effect of noise present in the input signal of a comparator and to permit precise control of the comparator trip point is to introduce hysteresis feedback in the comparator circuit. See, e.g. Graeme, Jerald G., Designing with Operational Amplifiers, 60-62 (McGraw-Hill Book Co. 1977). A hysteresis control signal is typically switched (through a diode) to the comparator input. Switching occurs dependent upon the output of the comparator. Trip-point errors are reduced by the introduced hysteresis. Unfortunately, such diode clipper circuits are incompatible with CMOS technologies. Monolithic hysteresis comparators employing bipolar junction transistors and introducing hysteresis through emitter feedback are also known. See, e.g. U.S. Pat. No. 3,998,595 to Eatock (issued Oct. 26, 1976).
Another method known in the art for reducing errors in a comparator circuit is to use a chopper stabilized A-C coupled amplifier as a buffer. The output of the buffer is switched between the two inputs of a comparator. The output of the comparator is responsive to the difference in potential between the two inputs. Such a scheme is disclosed in U.S. Pat. No. 4,237,390 to Buurma (issued Dec. 2, 1980). This reference also discloses a coupling capacitor for coupling the buffer amplifier to the switched input. A switch is arranged to periodically connect the output of the comparator to the input of the comparator to drive the comparator to the trip point. The circuit taught by the Buurma reference reduces the effect of input capacitance on the operation of the comparator.
Switching comparators implemented in CMOS technology are disclosed in McGrogan, Jr. (U.S. Pat. No. 3,676,702, issued July 11, 1972) and Aoki et al (U.S. Pat. No. 4,211,942, issued July 8, 1980). Such known CMOS switching comparators require multiple active stages operating at linear operating points (operational amplifiers), thus requiring relatively large amounts of power and introducing error in the comparator output.
CMOS differential comparators utilizing hysteresis to decrease the effect of noise on the comparator output are disclosed in U.S. Pat. No. 4,394,587 to McKenzie et al (issued July 19, 1983) and U.S. Pat. No. 4,110,641 to Payne (issued Aug. 29, 1978). The circuits disclosed in these references likewise have substantial power supply requirements due to utilization of several active elements operating at linear operating points.
Other exemplary prior art patents of possible general interest to differential amplifiers MOS sense amplifiers, CMOS switched circuits and signal magnitude measurements are:
U.S. Pat. No. 3,660,774 to Eachus (1972);
U.S. Pat. No. 4,375,039 to Yamauchi (1983); and
U.S. Pat. No. 4,323,887 to Buurma (1982).
U.S. Pat. No. 4,068,138 to Miyakawa et al (issued Jan. 10, 1978) discloses a single converter which compares a varying input voltage with a predetermined reference voltage. The operational amplifier has negative and positive input terminals and generates an output voltage signal in proportion to the difference between the voltages applied to its two input terminals. When the input voltage is less than the reference voltage, one group of electronic switches turns on, so that the input voltage and the reference voltage are applied to the negative and the positive input terminals of the operational amplifier, respectively. When the input voltage is greater than the reference voltage, the other group of the electronic switches turns on, so that the input voltage and the reference voltage are applied to the positive and the negative input terminals of the operational amplifier, respectively. The input voltage is thereby converted into an output voltage in absolute value.
The relatively recent development of CMOS switched-capacitor technology provides a way to incorporate on a single integrated circuit a high density of switching, resistive, capacitive and linear amplifier elements having very low power consumption. Moreover, the development of techniques for fabricating capacitive and resistive elements to precise values (such as, for example, by fabricating precision MOS capacitive elements wherein the ratio of two MOS capacitors defines the value of the element) has permitted the development of circuits comprising components having excellent temperature and voltage stability coefficients as well as component value which may be accurately and precisely specified. Such technology has been particularly applied in monolithic signal filtering applications. See, e.g., Allstot et al, TECHNOLOGICAL DESIGN CONSIDERATIONS FOR MONOLITHIC MOS SWITCHED-CAPACITOR FILTERING SYSTEMS (Proceedings of the IEEE, Vol. 71, No. 8, August 1983).